Property Specification Language
Property Specification Language (PSL) is a temporal logic extending linear temporal logic with a range of operators for both ease of expression and enhancement of expressive power. PSL makes an extensive use of regular expressions and syntactic sugaring. It is widely used in the hardware design and verification industry, where formal verification tools (such as model checking) and/or logic simulation tools are used to prove or refute that a given PSL formula holds on a given design.
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- Comment
- enProperty Specification Language (PSL) is a temporal logic extending linear temporal logic with a range of operators for both ease of expression and enhancement of expressive power. PSL makes an extensive use of regular expressions and syntactic sugaring. It is widely used in the hardware design and verification industry, where formal verification tools (such as model checking) and/or logic simulation tools are used to prove or refute that a given PSL formula holds on a given design.
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- Has abstract
- enProperty Specification Language (PSL) is a temporal logic extending linear temporal logic with a range of operators for both ease of expression and enhancement of expressive power. PSL makes an extensive use of regular expressions and syntactic sugaring. It is widely used in the hardware design and verification industry, where formal verification tools (such as model checking) and/or logic simulation tools are used to prove or refute that a given PSL formula holds on a given design. PSL was initially developed by Accellera for specifying properties or assertions about hardware designs. Since September 2004 the standardization on the language has been done in IEEE 1850 working group. In September 2005, the IEEE 1850 Standard for Property Specification Language (PSL) was announced.
- Hypernym
- Logic
- Is primary topic of
- Property Specification Language
- Label
- enProperty Specification Language
- Link from a Wikipage to an external page
- www.springer.com/engineering/circuits+%26+systems/book/978-0-387-35313-5
- www.research.ibm.com/people/e/eisner/papers/cav49.pdf
- www.cis.upenn.edu/~fisman/documents/EFHMV_ICALP03_full.pdf
- www.accellera.org/
- www.doulos.com/knowhow/psl/
- www.eda.org/ieee-1850
- standards.ieee.org/announcements/pr_1850psl.html
- www.systemverilog.us/psl_info.html
- www.project-veripage.com/psl_tutorial_1.php
- Link from a Wikipage to another Wikipage
- Accellera
- Assertion (computing)
- Category:Formal specification languages
- Category:Hardware verification languages
- Category:IEC standards
- Category:IEEE DASC standards
- File:Multiple clocks.jpg
- File:Need for multiple clocks.jpg
- File:The trigger operator - slide 1.jpg
- File:The trigger operator - slide 2.jpg
- File:The trigger operator - slide 3.jpg
- File:The trigger operator - slide 4.jpg
- Formal verification
- IEEE
- Linear temporal logic
- Logic simulation
- Model checking
- Omega-regular languages
- Open SystemC Initiative
- Property (philosophy)
- Regular expressions
- Standardization
- SystemC
- SystemVerilog
- Temporal logic
- Verilog
- VHDL
- SameAs
- 4v363
- m.0398fx
- Property Specification Language
- Property Specification Language
- Property Specification Language
- Property Specification Language
- PSL (język opisu właściwości)
- Q751505
- Subject
- Category:Formal specification languages
- Category:Hardware verification languages
- Category:IEC standards
- Category:IEEE DASC standards
- Thumbnail
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- Property Specification Language?oldid=1031222099&ns=0
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- Wikipage revision ID
- 1031222099
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