Application-specific instruction set processor

An application-specific instruction set processor (ASIP) is a component used in system-on-a-chip design. The instruction set of an ASIP is tailored to benefit a specific application. This specialization of the core provides a tradeoff between the flexibility of a general purpose CPU and the performance of an ASIC.

Comment
enAn application-specific instruction set processor (ASIP) is a component used in system-on-a-chip design. The instruction set of an ASIP is tailored to benefit a specific application. This specialization of the core provides a tradeoff between the flexibility of a general purpose CPU and the performance of an ASIC.
Has abstract
enAn application-specific instruction set processor (ASIP) is a component used in system-on-a-chip design. The instruction set of an ASIP is tailored to benefit a specific application. This specialization of the core provides a tradeoff between the flexibility of a general purpose CPU and the performance of an ASIC. Some ASIPs have a configurable instruction set. Usually, these cores are divided into two parts: static logic which defines a minimum ISA (instruction-set architecture) and configurable logic which can be used to design new instructions. The configurable logic can be programmed either in the field in a similar fashion to a field-programmable gate array (FPGA) or during the chip synthesis. ASIPs have two ways of generating code: either through a retargetable code generator or through a retargetable compiler generator. The retargetable code generator uses the application, ISA, and Architecture Template to create the code generator for the object code. The retargetable compiler generator uses only the ISA and Architecture Template as the basis for creating the compiler. The application code will then be used by the compiler to create the object code. ASIPs can be used as an alternative of hardware accelerators for baseband signal processing or video coding. Traditional hardware accelerators for these applications suffer from inflexibility. It is very difficult to reuse the hardware datapath with handwritten finite-state machines (FSM). The retargetable compilers of ASIPs help the designer to update the program and reuse the datapath. Typically, the ASIP design is more or less dependent on the tool flow because designing a processor from scratch can be very complicated. One approach is to describe the processor using a high level language and then to automatically generate the ASIP's software toolset. There are some commercial tools to design ASIPs from a high-level language, for example ASIP Designer from Synopsys or Studio from Codasip. There is an open source tool as well, TTA-based co-design environment (TCE).
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Component
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Application-specific instruction set processor
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enApplication-specific instruction set processor
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codasip.com/codasip-studio/
www.synopsys.com/dw/ipdir.php%3Fds=asip-designer
tce.cs.tut.fi
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Application-specific integrated circuit
Category:Application-specific integrated circuits
Category:Coprocessors
Category:Gate arrays
Category:Instruction processing
Category:Integrated circuits
Central processing unit
Digital signal processor
Field-programmable gate array
Finite-state machine
Instruction set
RISC-V
System-on-a-chip
System on Chip
SameAs
4ocLx
Application-specific instruction set processor
Application-specific instruction-set processor
Application-specific instruction-set processor
ASIP
ASIP
m.02x37hv
Q621583
Uygulamaya Özel Komut Seti İşlemcisi
معالج مجموعة تعليمات محددة التطبيق
专用指令集处理器
Subject
Category:Application-specific integrated circuits
Category:Coprocessors
Category:Gate arrays
Category:Instruction processing
Category:Integrated circuits
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Application-specific instruction set processor?oldid=1123373069&ns=0
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Wikipage page ID
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Wikipage revision ID
1123373069
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